

A
AC0
AC1
ACW
Format
Reading
AND-Matrix
AR
Architecture Control Word
Assembler
Asynchronous Preset
Asynchronous Reset
B
Blank Test
Bulk Erase
C
Chip Diagramm
Circuit Description
Comment
Compare
Configuration, Save
Control Characters
Copy
D
DESCRIPTION
E
Edit Mode
Edit Voltage
Editor, Call
Editor, Selection
Erase
Error Messages
Example
GA16V8
GAL22V10
GAL20RA10
F
Feed Back
File Checksum
Fuse Checksum
Fuse File
G
GAL
GAL-Assembler
GAL-Checker
GAL-Info
GAL-Types
GAL16V8
Intern Structure
OLMC
Pin Designation
Modes
Security-Bit
Signature
GAL20RA10
Asynchronous Preset
Asynchronous Reset
Intern Structure
OLMC
Pin Designation
Preload
Tristate Control
GAL20V8
Intern Structure
OLMC
Pin Designation
Modes
Security-Bit
Signature
GAL22V10
Intern Structure
OLMC
Pin Designation
Security-Bit
Signature
GALerTest
H
Hardware
Hardware-Version
Help
History
I
Installation
J
JEDEC File
Generate
Parameter
K
Keywords
M
Matrix, AND-
Mode
N
Negation
O
OLMC
Optimizer
Output, Combinational
Output Cell, Configurable
P
P,/V
PCB
Pin Description File
Pin Declaration
Pin Names
Clear
Show
Preload
Printed Circuit Board
Product Term
Program
How to Do
Programming-Algorithm
PT
Q
Quine-McCluskey
Quit
R
RAG0-RAG5
Reassembler
Register Output
S
S0
S1
SCLK
SDIN
SDOUT
Security-Fuse
Set
Test
Shareware
Signature
Read
Source File
SP
SYN
Synchronous Preset
T
Testing
Tristate Output
Type-Requester
V
VIL
W
Write Access
X
XOR

