One of the biggest mysteries of the Disciple interface is the two PAL2L08 ics (Ic8 & Ic9), what they do, how to get replacements, and how to get the fusemap (jedec file / equations) that they contain. I hope this page will answer all this questions, along with a thorough explanation of each logic equation that these nice Ics contain in their silicon make up.
The copyright for all the equations in the PAL ICs is owned by Bruce Gordon, the original disciple designer. From what I understand from reading some posts on usenet, the original equations were on a disc that got lost, and remained unknown for sometime. I also have seen some posts from Bob Brenchley indicating that he was in touch with Bruce, and if they were found, he would have no problem with the distribution.
As these Ics have a protection bit which stops you reading their fuse map, which is usually blown, finding out their contents and replacing them is difficult. Bruce, if you are out there, thanks for a GREAT interface, and if you want me to pull this page, I'll be more than happy to do so.
Fortunatley a nice dutch man called Rudi Biesma placed his Ics in a high / low device which sends every logic combination to every pin and produces a table of the outputs. It then can produce a fuse map of the IC. With this lovely Jedec file from Rudy, I disassembled it and obtained the equations using PALASM, and then set about figuring out just what the heck was going on.
A PAL IC is an older type of programmable logic IC. Basically you can program it with a load of boolean equations to give whatever outputs you want under certain input conditions. PALs were later replaced by GALS (which can be programmed to act like a PAL) and now something called ????. The PAL20L8 ICs in the disciple have been out of production for many years now, and are increasingly hard to come by. Your best bet is to search for obsolete electronic component suppliers on the web. They are available, but can be pricey as minimum order quantaties are required. The ones normally found in a disciple are manunfactured by national semiconductor, and are of the A variety (A is a speed rating A is the slowest). I have successfully replaced them with MMI PAL20L8B ICs which are slightly faster, but are pin for pin compatible. PAL20L8 Ics from other manufactures may be just as compatible, but it is well worth checking as these things are expensive (around £10 quid a chip all in, plus the min order, which is normally > £100). Rudi Biesma tried to replace his PAL20L8s with GALS but reported no luck.
Either buy the Ics yourself and get someone with a programmer to program them, or if you are really stuck I will supply both PAL Ics, fully programmed for £30 + postage.
The function of the two PAL ics in the disciple are to control the following :
Page out the speccy ROM and enable the Disciple RAM / ROM when the Z80 accesses certain memory addresses (0x0000, 0x0008, 0x0066, 0x28E) or an NMI is generated (snapshot button)
Page out speccy ROM and enable Disciple ROM & RAM when a reset is performed
Page out speccy ROM and enable Disciple ROM & RAM when a network request is performed
Holding the speccy ROM out and the Disciple ROM & RAM enabled after they have been brought in for a specific condition, until they need to be paged out again
Page out the speccy ROM and enable Disiciple ROM & RAM when an IO request is written to port 0x7B (reset / set boot control of DOS needs to reloaded)
Enable the WD1772 disc controller (IC4) when an IO request is written or read from its' I/O ports (0x1B, 0x5B, 0x9B, 0xDB)
Generate a clock pulse for IC5 when an IO write request is sent to the WD1772 control port (0x1F)
Output a clock pulse to the printer port IC11 when data is written to it's port (0xFB)
Enable the joystick controller Ics (IC1 & IC10) when an IO request is read from the joystick ports (kempston and sinclair)
Tell the spectrum to WAIT when data is being pushed out to the network
So you can see these sweet little IC's actually control most of the disciple, and NOTHING works without either one, as their logic equations are deeply intertwined........
Woe there sailor boy ! Before you go wading in, understand a few things about boolean logic and electronic symbols.
The symbols :
^ means active low (ie. ^RD means that if a read is happening, this line will be LOW)
/ means NOT
+ means OR
* means AND
You will also have to have a rough understanding of how the good ole Z80 works (what lines are set when performing IO, mem read / writes etc) and a reasonable understanding of the disciple itself. The latter can be obtained for the excellent Ramsoft "Disciple / +D Technical Guide"
A short note about tristate. Some IC input / outputs can have 3 levels. These are logic zero, logic one and disconnected (ie just floating). The third state is very handy when you only want an IC to do stuff some of the time and pretend it's not there others. Just like the disciple ROM / RAM. While physically connected to the address / data bus, unless their Chip Enable (CE) pin is activated, their pins will be internally disconnected, so won't interfere unless requested to.
It is also recommended you look at the disciple circuit diagram shown below to see how these Ics fit together and link to other disciple components.
Be aware that outputs O17 and O18 of IC9 feed into inputs I1 and I2 of IC8 and output O22 from IC8 feed into input I14 of IC9, providing a nice logic link between all the equations; see told you they were intertwined !!
In the equations I've substituted wherever possible the names of the signals on the spectrum bus the Inputs and Outputs are connected to. The references p8_022, p9_O17 and p9_O18 refer to pal IC8 Output 22, pal IC9 Output 17 and pal IC9 Output 18 resepectivley.
Hey ho, onwards with these equations. The equation is listed, with my explaination below.
CHIP DIS_ASM PAL20L8 (PAL IC8)
Pin Descriptions
PIN 1 p9_O18
PIN 2 p9_017
PIN 3 A10
PIN 4 A0
PIN 5 A4
PIN 6 ^RESET
PIN 7 ^WR
PIN 8 ^RD
PIN 9 ^NREQ
PIN 10 A12
PIN 11 A13
PIN 12 GND
PIN 13 A15
PIN 14 A14
PIN 15 O15 (/CE Disciple RAM)
PIN 16 O16 (/CE Disciple ROM)
PIN 17 O17 (/M1)
PIN 18 O18 (NC)
PIN 19 O19 (NC)
PIN 20 ^ROMCS
PIN 21 O21 (NC)
PIN 22 O22 (PAL IC9, I12)
PIN 23 A11
PIN 24 VCC
EQUATIONS
O22.TRST = VCC
/O22 = /A4 * /^RD * ^NREQ
+ /A4 * /^WR * ^NREQ
+ /A10 * /A11 * /A8 * /A4 * /^RD * /^NREQ * /A12 * /A14 *
/A13 * /A15
Used as a partial equation to help form other equations in Pal9
O21.TRST = VCC
/O21 = ^ROMCS
+ /p9_O18* /^RD * O17
Used as a partial equation to O15, O16 and O20 (ROMCS). Condition met when IOREQ to port 0xBB OR memory read from 0x0001, 0x008 (RST8), 0x0066 (NMI code), 0x028E or speccy ROM already paged out
^ROMCS.TRST = VCC
/^ROMCS = /O17
+ O21
+ /^RESET
+ /p9_O18* /^WR
Pull speccy rom out when O17 met or a write to any ports mentioned in p9_018 or a RESET happens.
O19.TRST = VCC
/O19 = O18
+ /^RESET
+ /p9_O17* /^RD
Condition met when a reset happens or a read to port 0x7B (set/unset boot flipflop) or O18. Intertwined with O18 below. Used as a partial to O16 and O15 below.
O18.TRST = VCC
/O18 = O19
+ /p9_O17* /^WR
Condition met when a write to port 0x7B (set/unset boot flipflop) or O19. Used as a partial to O16 and O15 below.
O16.TRST = VCC
/O16 = ^ROMCS * O18 * /^RD * /^NREQ * /A14 * /A13 * /A15
+ ^ROMCS * O19 * /^RD * /^NREQ * /A14 * A13 * /A15
O16 is the Disciple ROM CE line, so this equation controls when the Disciple ROM should be paged in. Met when the speccy ROM is OUT and we are reading from address < 8192 and the RAM flip flop is unset OR if the address is < 16384 and the RAM flip flop is not set.
O15.TRST = VCC
/O15 = ^ROMCS * O19 * /^RD * /^NREQ * /A14 * /A13 * /A15
+ ^ROMCS * O19 * /^WR * /^NREQ * /A14 * /A13 * /A15
+ ^ROMCS * O18 * /^RD * /^NREQ * /A14 * A13 * /A15
+ ^ROMCS * /^WR * O18 * /^NREQ * /A14 * A13 * /A15
O15 is the Disciple RAM CE line, so this equation controls when the Disciple RAM should be paged in. Met when the speccy ROM is OUT and we are reading / writing from address < 8192 (RAM flip flop set) or reading / writing from address < 16384 (RAM flip flop not set).
Phew, thats IC8 done. It was the hardest. Glad thats over. Ready for IC9 ?
CHIP DIS_ASM PAL20L8 (Disciple IC9)
Pin Descriptions
PIN 1 A9
PIN 2 A5
PIN 3 A6
PIN 4 A7
PIN 5 ^WR
PIN 6 ^RD
PIN 7 ^IORQ
PIN 8 A3
PIN 9 A2
PIN 10 A1
PIN 11 A0
PIN 12 GND
PIN 13 NET
PIN 14 p8_O22
PIN 15 O15 (CLK Disciple IC5)
PIN 16 O16 (/CS Disciple IC4 WD1772)
PIN 17 O17 (I2 PAL IC8)
PIN 18 O18 (I1 PAL IC8)
PIN 19 O19 (/CE Disciple IC1a joystick1)
PIN 20 O20 (/CE Disciple IC10a joystick2)
PIN 21 O21 (/WAIT)
PIN 22 O22 (CLK Disciple IC11)
PIN 23 ^N1
PIN 24 VCC
EQUATIONS
O22.TRST = VCC
/O22 = A5* A6 * ^N1 * A7 * /^WR * /^IORQ * A3 * /A2 *
A1 * p8_O22 * A0
Generate a clock pulse for the printer IC11 when an IOREQ write is sent to printer port (0xFB).
O21.TRST = VCC
/O21 = A5* /A6 * ^N1 * /A7 * /^WR * /^IORQ * A3 * /A2 *
A1 * p8_O22 * A0 * NET
Tell the speccy to wait while a network request is written to the network port (0x3B).
O20.TRST = VCC
/O20 = /A5* /A6 * ^N1 * /A7 * /^RD * /^IORQ * A3 * A2 *
A1 * p8_O22 * A0
IOREQ read of joy1 port (0x1F). Set CE on IC10
O19.TRST = VCC
/O19 = A5* A6 * ^N1 * A7 * /^RD * /^IORQ * A3 * A2 *
A1 * p8_O22 * /A0
IOREQ read of joy2 port (0xFE). Set CE on IC1
O18.TRST = VCC
/O18 = A5* /A6 * ^N1 * A7 * /^IORQ * A3 * /A2 * A1 *
p8_O22 * A0
+ /A5* /A9* /A6 * /^N1 * /A7 * /^RD * ^IORQ * A3 *
/A2 * /A1 * /p8_O22 * /A0
+ A5* /A9* A6 * /^N1 * /A7 * /^RD * ^IORQ * /A3 *
A2 * A1 * /p8_O22 * /A0
+ /A5* A9* /A6 * /^N1 * A7 * /^RD * ^IORQ * A3 *
A2 * A1 * /p8_O22 * /A0
+ /A5* /A9* /A6 * /^N1 * /A7 * /^RD * ^IORQ * /A3 *
/A2 * /A1 * /p8_O22 * A0
Partial equation to IC8. Take this one a line at a time.
IOREQ to port 187 OR
Memory Read location 0x0008 (RST8) OR
Memory Read location 0x0066 (NMI code) OR
Memory Read location 0x028E OR
Memory Read location 0x0001
O17.TRST = VCC
/O17 = A5* A6 * ^N1 * /A7 * /^IORQ * A3 * /A2 * A1 *
p8_O22 * A0
Partial equation to IC8. IOREQ to port 0x7B (reset / set boot port)
O16.TRST = VCC
/O16 = /A5* ^N1 * /^IORQ * A3 * /A2 * A1 * p8_O22 * A0
This is CE for IC4 WD1772 disk controller. Condition met when any IOREQ to ports (0x1B, 0x5B, 0xDB, 0x9B)
O15.TRST = VCC
/O15 = /A5* /A6 * ^N1 * /A7 * /^WR * /^IORQ * A3 * A2 *
A1 * p8_O22 * A0
This will generate a clock pulse for IC5 when data is written to the drive control IO port (0x31). IC5 seems to translate data on the data bus to the WD1772 IC.
Amazing what'll you'll do to get your beloved disciple working again after 10 years...... and my way of giving back to both the open source and Sinclair community, as well as helping to fix other broken beautiful disciple interfaces !
Tell me ! This is my interpretation and may well have errors. Let me know, I'll check and fix. Email me at alandpearson@yahoo.com
By all means, download IC8 and IC9.
Hmm haven't got that far yet. The jedec source is HERE for the single PAL in it, but I haven't dissassmbled or figured out it's equations yet. Someday.
Thank Bruce Gordon for making such a wonderful interface, and Rudi Biesma for sending me the jedecs !
Oh yeah, here ya go.
Thanks to Rudy Biesma for supplying the disciple fuse maps, and Ian Worsley for the Plus D. Also thanks to Ramsoft for producing the disciple technical guide, and the excellent realspec emulator.
Alan Pearson, (alandpearson@yahoo.com) September 2003
