CHROMA81

Switch 1: ON: enable 16K RAM at $4000-$7FFF.
Switch 2: ON: enable WRX graphics support for the CHROMA RAM. (=> read pixels from charset in RAM)
Switch 3: ON: enable 8K RAM at $2000-$3FFF.
Switch 4: ON: enable QS Character Board emulation at $8400 and $C400-$C7FF.
Switch 5: ON: enable RS232 socket.
Switch 6: ON: enable 16K RAM at $C000-$FFFF and enable the colour modes.

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OUT $7FEF, %00EMIGRB: Select colour mode	
	E = enable color
	M = color mode (s.u.)
	IGRB border color

If configuration switch 6 is set to OFF, the colour mode is forcibly disabled, colour mode 0 (character code mapping) selected, and the border restored to bright white.

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IN $7FEF: 
	only bit 6 is valid: 
	0 = color modes available (CHROMA present and config switch 6 = ON)

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color mode 0:
48K-49K holds a colour look-up table consisting of 128 characters (64+64inverted) each of 8 lines.
=> attr byte is at: $C000+(char*8)+line

attr bytes:	%IGRBigrb
	IGRB paper color
	igrb pen color

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color mode 1:
attributes are read from DFILE | 0xC000.  --> 48K-64K
=> DFILE can also be in range 8K++ and 32K++ but not below 8K!

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Sound:
The video signal is output to the audio channels of the SCART socket whenever video synchronisation is lost.

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Rear expansion bus:
the Chroma81 suppresses memory access behind itself.
With a ROM cartridge plugged in, the /MREQ and /RFSH lines of the rear expansion bus is held high to prevent a device
plugged in behind seeing ROM address accesses. 

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Reset:
A reset button is directly connected to /RST.
resetting the CPLD takes somewhat longer than CPU reset.

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Cartridge socket:
With a ROM cartridge plugged in, the /MREQ and /RFSH lines of the rear expansion bus is held high to prevent a device
plugged in behind seeing ROM address accesses. 
The ROM cartridge socket also overrides the character bitmap generator inside the ZX81. 
A ROM cartridge can populate all of the ROM address space from $0000-$3FFF.
A ROM cartridge will override the onboard 8K RAM at $2000 and $A000 if it is enabled.
NIMP: Early ZX81 ROMS had a bug in the FP math. One fix was to add a HW which forced some bits at certain addresses. 

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Joystick socket:
The joystick socket supports the cursor format. 
The socket is read using two input ports: $F7FE and $EFFE. 
The data matches keyboard key 5..8 + 0.

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RS232 Socket:

Handshake: For a PC, the RTS line should be used, whereas for a serial printer the DTR line should be used. A JUMPER is present on the Chroma interface to select which handshaking line to receive.

The RS232 socket is enabled using configuration switch 5.

The RS232 socket is controlled by I/O port $FEEF. The address lines are fully decoded. 
The data is sent and received INVERTED. (--> CPL)
Upon resetting the ZX81 or disabling of the RS232 socket via switch 5, the output lines are set to the IDLE state.

OUT $FEEF, %000000HD
	H = handshake: 1=ok to send
	D = data, inverted, 0=idle

%DHxxxxx0 = IN $FEEF
	D = data, inverted, 0=idle
	H = handshake, 1=ok to send
	0 = RS232 port present & enabled

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RAM:
The CHROMA81 has 32K of Ram.
Any enabled RAM will prevent a device plugged in behind seeing RAM address accesses. 

16K can be enabled at 16-32K 'onboard ram'.
16K appear at 3 locations:

 	$C000	16K: color attributes at DFILE | $C000 (mode 1)
 	$C000	1K:  color map (mode 0)
 	$C400	1K:  QS char board, visible at $8400 and $C400
 	$E000	8K:  at $2000, $A000 and $E000 

Switch3: enable 8K at $2000 and $A000
Switch6: enable 16K at $8000 => 8K also visible at $E000