Path: vanilla!asbach!hugis!smurf.noris.de!xlink.net!howland.reston.ans.net!news.sprintlink.net!demon!uknet!bhamcs!news.ox.ac.uk!elliott From: elliott%teaching.physics@ox.ac.uk (John Elliott) Newsgroups: comp.sys.sinclair Subject: Re: The Plus D Snapshot Date: 10 Jun 1995 12:39:08 GMT Organization: Oxford University Lines: 55 Distribution: world Message-ID: <3rc3pc$fbr@news.ox.ac.uk> References: <950609033155@digibank.demon.co.uk> <1995Jun9.194707.5326@lsl> NNTP-Posting-Host: teaching18.physics.ox.ac.uk X-Newsreader: TIN [version 1.2 PL2] In article <1995Jun9.194707.5326@lsl>, timbe@lsl.co.uk wrote: : The bank switching is controled by an out instruction, Z80 emulator : documentation probably tells you....; The system variable was the value the : operating system (if I can use that term loosely here) thought was the current : memory setup (it switched it around for itself from time to time then put it : back for you.). So in BASIC it was a pretty good way of controlling the memory, : (I suspect it was used in the interupts which would update the memory for you, : , but cannot remember any reasons why they would do that!). : The original 128K could swap the top 16K of memory between 8 banks, and swap : the screen from the begining of one page to another page (I think 2 and 4?), : the +3 could do a lot more than this. Right. The 128 has a memory map like: Rom [switchable]; Ram 5; Ram 2; Ram [switchable] The paging is all controlled by OUT commands to 7FFDh (32765). This port is write-only so a copy of the last byte sent to it is stored at 5B5Ch (23388). The byte to output is: Bits 0-2 : Ram for top 16k (0-7). 0 is the usual bank; 7 contains some scratchpads used by the 128k editor. Bit 3 : Screen select. 0 => Use the normal screen in bank 5. 1 => Use the shadow screen in bank 7. Bit 4 : ROM for bottom 16k. 0 => 128k editor 1 => 48k BASIC Bit 5 : Lock. If set, disables all further paging. The +3 uses the same mechanism as above, except that Bit 4 is now the low bit of the ROM select. It also uses port 1FFDh (8189) whose value is mirrored at 5B67h (23399). Bit 0 : Paging mode 0=normal 1=special Bit 1 : In normal mode, ignored In special mode bits 1 & 2 form a Bit 2 : ROM select high bit. 2-bit number from 0-3. Bit 3 : Disc motor Bit 4 : Parallel port strobe signal The four ROMs are: 0 - Menu system, editor, self-test program 1 - +3BASIC syntax 2 - +3DOS and disc self-test 3 - 48BASIC When paging is set to special, the memory map is: Bits 1&2 are: 0 Memory map: 0,1,2,3 1 4,5,6,7 2 4,5,6,3 3 4,7,6,3 -------------------------------------------------------------------------- John Elliott |BLOODNOK: "But why have you got such a long face?" |SEAGOON: "Heavy dentures, Sir!" - The Goon Show :-------------------------------------------------------------------------) from : 128K models uses condition that A1 and A15 are low by IN/OUT for accessing memory bank control logic in ULA chip. Actually only conditions are: A1=0 and IORQ line of Z80 is active (low). Both IN and OUT instructions activates memory bank control port. A15 could not be controlled in most cases - by INI and OUTI it takes value from B register, which is used as loop counter.