### special

exhlde
exhlde.l
exts		.b -> .w
exts.l  	.w -> .l
extu
extu.l


### load register

ld_zr_qr[.l]	all supported registers
ldi_zr[.l]  	all supported registers.  byte register: n*101
ldi_rr.lwu 	all long registers
ldi_rr.lws  	all long registers
ld0_zr[.l]	all supported registers

ld_zr_xhl[.l]	zr = (hl) 	zr = e .. hlhl
ld_xhl_qr[.l]	(hl) = qr	qr = e .. dede
gget_zr[.l]
gset_qr[.l]

alias:
ival[.bwl]


### get / set variables

get_zr_name	globals  	generated by macro
set_name_qr
lget_zr_name	locals (stack)	generated by macro
lset_name_qr
sget_zr_name	locals (static)	generated by macro
sset_name_qr
gvar		hl = address
lvar		hl = address
svar		hl = address

iget[.bwl] 	struct member	zr = l .. hlhl
iset[.bwl] 			qr = e .. dede
ivar		hl = address

atiget[.bwl]	array data	zr = l .. hlhl
atiset[.bwl]			qr = e .. dede
ati		hl = address


### load register with increment / decrement

ldxpp.sz	zr = (hl)++	zr = l .. hlhl
ldxmm.sz
ldppx.sz	zr = ++(hl)	zr = l .. hlhl
ldmmx.sz

ldxpp2				zr = hl
ldxpp4				zr = hl
...


### diadic operators: always hl *= de or (hl) *= de

add[.bwl]	l,hl,hlhl += e,de,dede
addi[.bwl]
addi.lw
addx[.bwl]	(hl) += e .. dede
addix[.bwl]	(hl) += n
addix.lw

sub ..
and ..
or ..
xor ..
sl ..
sru ..
srs ..

mul.sz  	.b .w .l 		hl *= de
mul.xxs		.lws .lbs .wbs
mul.xxu		.lwu .lbu .wbu
muli.sz		.b .w .l  		hl *= nn
muli.xxs	.lws .lbs .wbs
muli.xxu	.lwu .lbu .wbu
mulx.sz 	.b .w .l  		(hl) *= de
mulx.xxs 	.lws .lbs .wbs
mulx.xxu 	.lwu .lbu .wbu
mul10.sz	.b .w .l		hl *= 10

div.xxs		.bs .ws .ls  .lws .lbs .wbs	hl,de = hl/de
div.xxu		.bu .wu .lu  .lwu .lbu .wbu
divi.xxs	.bs .ws .ls  .lws .lbs .wbs	hl,de = hl/nn
divi.xxu	.bu .wu .lu  .lwu .lbu .wbu
divx.xxs	.bs .ws .ls  .lws .lbs .wbs	(hl) /= de
divx.xxu	.bu .wu .lu  .lwu .lbu .wbu


### monadic operators: hl or (hl)

inc.sz		l .. hlhl
incx.sz		(hl)
incx2		(hl) += 2
incx4		(hl) += 4

dec ..
sl1 ..
sru1 ..
srs1 ..


### monadic operators: hl

neg.sz
cpl.sz
not.sz
notnot.sz


### CMP: always hl - de

cmp.ub
cmp.usb
cmp.sub
cmp.sb
cmp ..