ALU - Arithmetic/Logic Unit --------------------------- The ALU performs calculations of the form ALU = ALU • DATA ALU = ALU • $FFFF-DATA where ALU is the ALU 16 bit data register and DATA is any data from the data bus. Implemented are the binary functions AND, OR, XOR and ADD. The input data from the data bus can be complemented before used as operand. The result sets a ZERO flag, and the flag Z88, which means one byte of the result word is zero, which will probably not be used in favour of a i/o bus interrupt flag. Adder: Depending on the clock the adder probably needs one wait state. The Adder also uses option control line 2 as CY input. The Adder generates a CY and an OVFL flag. Input Inverter: By use of the input complementer the ALU can also complement, negate and subtract with or without carry. Testing: Comparisons and zero tests can be done, if the result is just not loaded into the ALU register. Draw-backs: The ALU can not increment or decrement by its own. Add or subtract of 1 (or other small values) is intended to be done with the help of the immediate value byte of the assembler opcode. It is optimized for being used as a top-of-the-stack data register. Usage for address calculation is slow, because the current ALU register value will probably need to be save and restored. But this depends on the register usage model. More details: The CY flag for subtraction is used inverted for both input and output. The function of the ALU is selected with the option lines 0 and 1. Depending on these lines, the ALU performs ADD, XOR, AND/OR or a LOAD. - LOAD is to load data into the ALU register. - AND/OR are implemented with 3-resistor majority gates. This had the advantage, that i could reduce the amount of selectable functions to 4 and thus the function select code to 2 control lines. The actual operation AND or OR is choosen by another control line for which i reused the CY line. - XOR is implemented straight forward. - ADD is implememted using '283 4-bit adders. I thought of constructing them with basic gates, but this would have ended up in a lot more ICs and i had no space for that. The ALU uses 4 control lines in total: - 2 select the operation, - 1 is CY input to the adder or selects AND/OR - 1 controls the input inverters and it sets 3 (4) condition lines which are used in the micro code to branch into one of the 2 code planes depending on the flags: - CY: unsigned arithmetic overflow or borrow - OVFL: signed arithmetic overflow - ZERO: result is 0 - Z88: at least one byte of the result is 0. But this line will probably be used for i/o interrupt requests instead. Even if a boolean operation is performed, the adder sets the CY and OVFL condition lines.