<?xml version="1.0" encoding="utf-8"?>
<!DOCTYPE eagle SYSTEM "eagle.dtd">
<eagle version="6.6.0">
<drawing>
<library>
<packages>
<package name="MA20-2W">
<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>
</package>
<package name="K1-BUS-79X100">
<description>&lt;p&gt;Half-size Board for the K1-Bus.</description>
</package>
<package name="K1-BUS-160X100-HANDLÖT">
<description>&lt;p&gt;Full-size Board for the K1-Bus.
&lt;p&gt;Inner top pads of the conenctor have restriction rings to prevent auto-router connections. 
&lt;br&gt;Intended for self-manufactured 2-sided boards without real vias (no copperfill in vias.) where connecting the unreachable top-side signals is challenging.</description>
</package>
<package name="MA20-2W-MIRRORED-PIN-NUMBERS">
<description>&lt;p&gt;40-pin Pin Header with mirrored pin numbers.

&lt;p&gt;For pin headers which are mounted top-side-down or connected to the other side of the flat ribbon cable.</description>
</package>
<package name="K1-BUS-160X100-MIRRORED">
<description>&lt;p&gt;Full-size Board for the K1-Bus.

&lt;p&gt;The connector is mirrored. For boards which are intended to be mounted top-side-down or vis-a-vis to the other boards with components up.</description>
</package>
<package name="2X20">
<description>&lt;b&gt;PIN HEADER&lt;/b&gt;</description>
</package>
<package name="K1-CPU">
<description>&lt;p&gt;Board for the K1-16/16 CPU.
&lt;p&gt;see k1.dyndns.org</description>
</package>
<package name="K1-BUS-79X100-HANDLÖT">
<description>&lt;p&gt;Half-size Board for the K1-Bus.
&lt;p&gt;Inner top pads of the conenctor have restriction rings to prevent auto-router connections. 
&lt;br&gt;Intended for self-manufactured 2-sided boards without real vias (no copperfill in vias.) where connecting the unreachable top-side signals is challenging.</description>
</package>
<package name="K1-BUS-160X100">
<description>&lt;p&gt;Full-size Board for the K1-Bus.</description>
</package>
<package name="K1-BUS-160X100-MIRRORED-HANDLÖT">
<description>&lt;p&gt;Full-size Board for the K1-Bus.

&lt;p&gt;The connector is mirrored. For boards which are intended to be mounted top-side-down or vis-a-vis to the other boards with components up.

&lt;p&gt;Inner top pads of the conenctor have restriction rings to prevent auto-router connections. 
&lt;br&gt;Intended for self-manufactured 2-sided boards without real vias (no copperfill in vias.) where connecting the unreachable top-side signals is challenging.</description>
</package>
<package name="K1-CPU-IO">
<description>Variante des K1-CPU Boards mit kleinen Löchern&amp;Pads, für die unterste Platine.</description>
</package>
</packages>
<symbols>
<symbol name="K1-BUS-PWR">
<pin name="GND@4" direction="pwr"/>
<pin name="GND@3" direction="pwr"/>
<pin name="VCC@4" direction="pwr"/>
<pin name="VCC@3" direction="pwr"/>
<pin name="GND@2" direction="pwr"/>
<pin name="GND@1" direction="pwr"/>
<pin name="VCC@2" direction="pwr"/>
<pin name="VCC@1" direction="pwr"/>
</symbol>
<symbol name="K1-BUS-STG-CPU">
<pin name="!RESET" direction="oc" function="dot"/>
<pin name="!SELECT" direction="in" function="dot"/>
<pin name="!WAIT" direction="oc" function="dot"/>
<pin name="!IRPT" direction="oc" function="dot"/>
<pin name="!WR_DATA" direction="in" function="dot"/>
<pin name="!RD_DATA" direction="in" function="dot"/>
<pin name="!WR_IRPT" direction="in" function="dot"/>
<pin name="!RD_IRPT" direction="in" function="dot"/>
</symbol>
<symbol name="K1-BUS-ADDR-CPU">
<pin name="A5" direction="in"/>
<pin name="A4" direction="in"/>
<pin name="A3" direction="in"/>
<pin name="A1" direction="in"/>
<pin name="A2" direction="in"/>
<pin name="A0" direction="in"/>
</symbol>
<symbol name="K1-BUS-I2C-CPU">
<pin name="I2C_CLK" direction="in"/>
<pin name="I2C_DATA" direction="oc"/>
</symbol>
<symbol name="K1-BUS-DATA-CPU">
<pin name="D15"/>
<pin name="D13"/>
<pin name="D11"/>
<pin name="D14"/>
<pin name="D12"/>
<pin name="D10"/>
<pin name="D9"/>
<pin name="D7"/>
<pin name="D8"/>
<pin name="D6"/>
<pin name="D5"/>
<pin name="D3"/>
<pin name="D4"/>
<pin name="D2"/>
<pin name="D0"/>
<pin name="D1"/>
</symbol>
<symbol name="K1-BUS-ADDR-IO">
<pin name="A5" direction="out"/>
<pin name="A4" direction="out"/>
<pin name="A3" direction="out"/>
<pin name="A1" direction="out"/>
<pin name="A2" direction="out"/>
<pin name="A0" direction="out"/>
</symbol>
<symbol name="K1-BUS-STG-IO">
<pin name="!RESET" direction="oc" function="dot"/>
<pin name="!SELECT" direction="out" function="dot"/>
<pin name="!WAIT" direction="oc" function="dot"/>
<pin name="!IRPT" direction="oc" function="dot"/>
<pin name="!WR_DATA" direction="out" function="dot"/>
<pin name="!RD_DATA" direction="out" function="dot"/>
<pin name="!WR_IRPT" direction="out" function="dot"/>
<pin name="!RD_IRPT" direction="out" function="dot"/>
</symbol>
<symbol name="K1-BUS-I2C-IO">
<pin name="I2C_CLK" direction="out"/>
<pin name="I2C_DATA" direction="oc"/>
</symbol>
<symbol name="K1-BUS-DATA-IO">
<pin name="D15"/>
<pin name="D13"/>
<pin name="D11"/>
<pin name="D14"/>
<pin name="D12"/>
<pin name="D10"/>
<pin name="D9"/>
<pin name="D7"/>
<pin name="D8"/>
<pin name="D6"/>
<pin name="D5"/>
<pin name="D3"/>
<pin name="D4"/>
<pin name="D2"/>
<pin name="D0"/>
<pin name="D1"/>
</symbol>
<symbol name="K1-CPU">
<pin name="D0"/>
<pin name="D1"/>
<pin name="D2"/>
<pin name="D3"/>
<pin name="D4"/>
<pin name="D5"/>
<pin name="D6"/>
<pin name="D7"/>
<pin name="D8"/>
<pin name="D9"/>
<pin name="D10"/>
<pin name="D11"/>
<pin name="D12"/>
<pin name="D13"/>
<pin name="D14"/>
<pin name="D15"/>
<pin name="A0"/>
<pin name="A1"/>
<pin name="A2"/>
<pin name="A3"/>
<pin name="A4"/>
<pin name="A5"/>
<pin name="A6"/>
<pin name="A7"/>
<pin name="A8"/>
<pin name="A9"/>
<pin name="A10"/>
<pin name="A11"/>
<pin name="A12"/>
<pin name="A13"/>
<pin name="A14"/>
<pin name="A15"/>
</symbol>
<symbol name="K1-CPU-CTL">
<pin name="!CMD.OE" direction="out"/>
<pin name="CMD.CLK" direction="out"/>
<pin name="!MEM.OE" direction="out"/>
<pin name="MEM.CLK" direction="out"/>
<pin name="!IO.OE" direction="out"/>
<pin name="IO.CLK" direction="out"/>
<pin name="!A2D.OE" direction="out"/>
<pin name="(A2D.CLK)" direction="out"/>
<pin name="!D0.OE" direction="out"/>
<pin name="D0.CLK" direction="out"/>
<pin name="!D1.OE" direction="out"/>
<pin name="D1.CLK" direction="out"/>
<pin name="!D2.OE" direction="out"/>
<pin name="D2.CLK" direction="out"/>
<pin name="!D3.OE" direction="out"/>
<pin name="D3.CLK" direction="out"/>
<pin name="!ALU.OE" direction="out"/>
<pin name="ALU.CLK" direction="out"/>
<pin name="!XXX2.OE" direction="out"/>
<pin name="XXX2.CLK" direction="out"/>
<pin name="!SWAP.OE" direction="out"/>
<pin name="SWAP.CLK" direction="out"/>
<pin name="!XXX3.OE" direction="out"/>
<pin name="XXX3.CLK" direction="out"/>
<pin name="!SR.OE" direction="out"/>
<pin name="SR.CLK" direction="out"/>
<pin name="!SL.OE" direction="out"/>
<pin name="SL.CLK" direction="out"/>
<pin name="!16TO4.OE" direction="out"/>
<pin name="16TO4.CLK" direction="out"/>
<pin name="!IVAL.OE" direction="out"/>
<pin name="D2AR.CLK" direction="out"/>
<pin name="!PC.OE" direction="out"/>
<pin name="PC.CLK" direction="out"/>
<pin name="!D2A.OE" direction="out"/>
<pin name="(D2A.CLK)" direction="out"/>
<pin name="!SP.OE" direction="out"/>
<pin name="SP.CLK" direction="out"/>
<pin name="!A0.OE" direction="out"/>
<pin name="A0.CLK" direction="out"/>
<pin name="!A1.OE" direction="out"/>
<pin name="A1.CLK" direction="out"/>
<pin name="!A2.OE" direction="out"/>
<pin name="A2.CLK" direction="out"/>
<pin name="!A3.OE" direction="out"/>
<pin name="A3.CLK" direction="out"/>
<pin name="D2AR.OE" direction="out"/>
<pin name="IOADDR.CLK" direction="out"/>
<pin name="ALU.CY" direction="pas"/>
<pin name="OPT.FU0" direction="out"/>
<pin name="ALU.Z" direction="pas"/>
<pin name="OPT.FU1" direction="out"/>
<pin name="IO.RND" direction="pas"/>
<pin name="OPT.CY" direction="out"/>
<pin name="ALU.OVFL" direction="pas"/>
<pin name="OPT.CPL" direction="out"/>
<pin name="CLK" direction="out"/>
<pin name="A.CPL" direction="out"/>
<pin name="!IO.WAIT" direction="oc"/>
<pin name="A.ADD" direction="out"/>
<pin name="!IO.IRPT" direction="oc"/>
<pin name="D0" direction="pas"/>
<pin name="!IO.RESET" direction="oc"/>
<pin name="D15" direction="pas"/>
</symbol>
<symbol name="K1-CPU-PWR">
<pin name="VCC@0" direction="sup"/>
<pin name="GND@0" direction="sup"/>
<pin name="VCC@1" direction="sup"/>
<pin name="GND@1" direction="sup"/>
<pin name="VCC@2" direction="sup"/>
<pin name="GND@2" direction="sup"/>
<pin name="VCC@3" direction="sup"/>
<pin name="GND@3" direction="sup"/>
<pin name="VCC@4" direction="sup"/>
<pin name="GND@4" direction="sup"/>
<pin name="VCC@5" direction="sup"/>
<pin name="GND@5" direction="sup"/>
<pin name="VCC@6" direction="sup"/>
<pin name="GND@6" direction="sup"/>
<pin name="VCC@7" direction="sup"/>
<pin name="GND@7" direction="sup"/>
<pin name="VCC@8" direction="sup"/>
<pin name="GND@8" direction="sup"/>
<pin name="VCC@9" direction="sup"/>
<pin name="GND@9" direction="sup"/>
</symbol>
<symbol name="K1-CPU-CTL-SSW">
<pin name="DO0" direction="in"/>
<pin name="DC0" direction="in"/>
<pin name="DO1" direction="in"/>
<pin name="DC1" direction="in"/>
<pin name="DO2" direction="in"/>
<pin name="DC2" direction="in"/>
<pin name="DO3" direction="in"/>
<pin name="DC3" direction="in"/>
<pin name="DO4" direction="in"/>
<pin name="DC4" direction="in"/>
<pin name="DO5" direction="in"/>
<pin name="DC5" direction="in"/>
<pin name="DO6" direction="in"/>
<pin name="DC6" direction="in"/>
<pin name="DO7" direction="in"/>
<pin name="DC7" direction="in"/>
<pin name="DO8" direction="in"/>
<pin name="DC8" direction="in"/>
<pin name="DO9" direction="in"/>
<pin name="DC9" direction="in"/>
<pin name="DO10" direction="in"/>
<pin name="DC10" direction="in"/>
<pin name="DO11" direction="in"/>
<pin name="DC11" direction="in"/>
<pin name="DO12" direction="in"/>
<pin name="DC12" direction="in"/>
<pin name="DO13" direction="in"/>
<pin name="DC13" direction="in"/>
<pin name="DO14" direction="in"/>
<pin name="DC14" direction="in"/>
<pin name="DO15" direction="in"/>
<pin name="DC15" direction="in"/>
<pin name="AO0" direction="in"/>
<pin name="AC0" direction="in"/>
<pin name="AO1" direction="in"/>
<pin name="AC1" direction="in"/>
<pin name="AO2" direction="in"/>
<pin name="AC2" direction="in"/>
<pin name="AO3" direction="in"/>
<pin name="AC3" direction="in"/>
<pin name="AO4" direction="in"/>
<pin name="AC4" direction="in"/>
<pin name="AO5" direction="in"/>
<pin name="AC5" direction="in"/>
<pin name="AO6" direction="in"/>
<pin name="AC6" direction="in"/>
<pin name="AO7" direction="in"/>
<pin name="AC7" direction="in"/>
<pin name="ALU.CY" direction="out"/>
<pin name="OPT0" direction="in"/>
<pin name="ALU.Z" direction="out"/>
<pin name="OPT1" direction="in"/>
<pin name="IO.RND" direction="out"/>
<pin name="OPT2" direction="in"/>
<pin name="ALU.OVFL" direction="out"/>
<pin name="OPT3" direction="in"/>
<pin name="CLK" direction="in"/>
<pin name="OPT4" direction="in"/>
<pin name="!IO.WAIT" direction="oc"/>
<pin name="OPT5" direction="in"/>
<pin name="!IO.INT" direction="oc"/>
<pin name="D0" direction="out"/>
<pin name="!IO.RES" direction="oc"/>
<pin name="D15" direction="out"/>
</symbol>
</symbols>
<devicesets>
<deviceset name="K1-BUS-CPU" prefix="K1">
<description>&lt;p&gt;K1-Bus, CPU-Platine, 1/1 Europakarte, 160 x 100 mm
&lt;p&gt;Pin directions are declared as seen by the CPU.</description>
<gates>
<gate name="K1-PWR" symbol="K1-BUS-PWR"/>
<gate name="K1-STG" symbol="K1-BUS-STG-CPU"/>
<gate name="K1-ADDR" symbol="K1-BUS-ADDR-CPU"/>
<gate name="K1-I2C" symbol="K1-BUS-I2C-CPU"/>
<gate name="K1-DATA" symbol="K1-BUS-DATA-CPU"/>
</gates>
<devices>
<device name="CON" package="MA20-2W">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="1/2-SIZE" package="K1-BUS-79X100">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="CON-MIRRORED" package="MA20-2W-MIRRORED-PIN-NUMBERS">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="1/1-MIRRORED" package="K1-BUS-160X100-MIRRORED">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="1/1-SIZE" package="K1-BUS-160X100">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="K1-BUS-IO">
<description>&lt;p&gt;K1-Bus Header für Peripherieplatinen
&lt;p&gt;Pin directions are declared as seen by peripherial device.</description>
<gates>
<gate name="K1-PWR" symbol="K1-BUS-PWR"/>
<gate name="K1-ADDR" symbol="K1-BUS-ADDR-IO"/>
<gate name="K1-STG" symbol="K1-BUS-STG-IO"/>
<gate name="K1-I2C" symbol="K1-BUS-I2C-IO"/>
<gate name="K1-DATA" symbol="K1-BUS-DATA-IO"/>
</gates>
<devices>
<device name="CONNECTOR" package="MA20-2W">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="1/2-SIZE" package="K1-BUS-79X100">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="1/1-SIZE" package="K1-BUS-160X100">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="1/1-MIRRORED" package="K1-BUS-160X100-MIRRORED">
<connects>
<connect gate="K1-ADDR" pin="A0" pad="20"/>
<connect gate="K1-ADDR" pin="A1" pad="19"/>
<connect gate="K1-ADDR" pin="A2" pad="18"/>
<connect gate="K1-ADDR" pin="A3" pad="17"/>
<connect gate="K1-ADDR" pin="A4" pad="16"/>
<connect gate="K1-ADDR" pin="A5" pad="15"/>
<connect gate="K1-DATA" pin="D0" pad="36"/>
<connect gate="K1-DATA" pin="D1" pad="35"/>
<connect gate="K1-DATA" pin="D10" pad="26"/>
<connect gate="K1-DATA" pin="D11" pad="25"/>
<connect gate="K1-DATA" pin="D12" pad="24"/>
<connect gate="K1-DATA" pin="D13" pad="23"/>
<connect gate="K1-DATA" pin="D14" pad="22"/>
<connect gate="K1-DATA" pin="D15" pad="21"/>
<connect gate="K1-DATA" pin="D2" pad="34"/>
<connect gate="K1-DATA" pin="D3" pad="33"/>
<connect gate="K1-DATA" pin="D4" pad="32"/>
<connect gate="K1-DATA" pin="D5" pad="31"/>
<connect gate="K1-DATA" pin="D6" pad="30"/>
<connect gate="K1-DATA" pin="D7" pad="29"/>
<connect gate="K1-DATA" pin="D8" pad="28"/>
<connect gate="K1-DATA" pin="D9" pad="27"/>
<connect gate="K1-I2C" pin="I2C_CLK" pad="5"/>
<connect gate="K1-I2C" pin="I2C_DATA" pad="7"/>
<connect gate="K1-PWR" pin="GND@1" pad="40"/>
<connect gate="K1-PWR" pin="GND@2" pad="38"/>
<connect gate="K1-PWR" pin="GND@3" pad="3"/>
<connect gate="K1-PWR" pin="GND@4" pad="1"/>
<connect gate="K1-PWR" pin="VCC@1" pad="39"/>
<connect gate="K1-PWR" pin="VCC@2" pad="37"/>
<connect gate="K1-PWR" pin="VCC@3" pad="4"/>
<connect gate="K1-PWR" pin="VCC@4" pad="2"/>
<connect gate="K1-STG" pin="!IRPT" pad="10"/>
<connect gate="K1-STG" pin="!RD_DATA" pad="13"/>
<connect gate="K1-STG" pin="!RD_IRPT" pad="14"/>
<connect gate="K1-STG" pin="!RESET" pad="6"/>
<connect gate="K1-STG" pin="!SELECT" pad="9"/>
<connect gate="K1-STG" pin="!WAIT" pad="8"/>
<connect gate="K1-STG" pin="!WR_DATA" pad="11"/>
<connect gate="K1-STG" pin="!WR_IRPT" pad="12"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="K1-CPU">
<gates>
<gate name="ADBUS" symbol="K1-CPU"/>
<gate name="CTL" symbol="K1-CPU-CTL"/>
<gate name="P" symbol="K1-CPU-PWR"/>
</gates>
<devices>
<device name="" package="K1-CPU">
<connects>
<connect gate="ADBUS" pin="A0" pad="A00"/>
<connect gate="ADBUS" pin="A1" pad="A01"/>
<connect gate="ADBUS" pin="A10" pad="A10"/>
<connect gate="ADBUS" pin="A11" pad="A11"/>
<connect gate="ADBUS" pin="A12" pad="A12"/>
<connect gate="ADBUS" pin="A13" pad="A13"/>
<connect gate="ADBUS" pin="A14" pad="A14"/>
<connect gate="ADBUS" pin="A15" pad="A15"/>
<connect gate="ADBUS" pin="A2" pad="A02"/>
<connect gate="ADBUS" pin="A3" pad="A03"/>
<connect gate="ADBUS" pin="A4" pad="A04"/>
<connect gate="ADBUS" pin="A5" pad="A05"/>
<connect gate="ADBUS" pin="A6" pad="A06"/>
<connect gate="ADBUS" pin="A7" pad="A07"/>
<connect gate="ADBUS" pin="A8" pad="A08"/>
<connect gate="ADBUS" pin="A9" pad="A09"/>
<connect gate="ADBUS" pin="D0" pad="D00"/>
<connect gate="ADBUS" pin="D1" pad="D01"/>
<connect gate="ADBUS" pin="D10" pad="D10"/>
<connect gate="ADBUS" pin="D11" pad="D11"/>
<connect gate="ADBUS" pin="D12" pad="D12"/>
<connect gate="ADBUS" pin="D13" pad="D13"/>
<connect gate="ADBUS" pin="D14" pad="D14"/>
<connect gate="ADBUS" pin="D15" pad="D15"/>
<connect gate="ADBUS" pin="D2" pad="D02"/>
<connect gate="ADBUS" pin="D3" pad="D03"/>
<connect gate="ADBUS" pin="D4" pad="D04"/>
<connect gate="ADBUS" pin="D5" pad="D05"/>
<connect gate="ADBUS" pin="D6" pad="D06"/>
<connect gate="ADBUS" pin="D7" pad="D07"/>
<connect gate="ADBUS" pin="D8" pad="D08"/>
<connect gate="ADBUS" pin="D9" pad="D09"/>
<connect gate="CTL" pin="!16TO4.OE" pad="DO14"/>
<connect gate="CTL" pin="!A0.OE" pad="AO3"/>
<connect gate="CTL" pin="!A1.OE" pad="AO4"/>
<connect gate="CTL" pin="!A2.OE" pad="AO5"/>
<connect gate="CTL" pin="!A2D.OE" pad="DO03"/>
<connect gate="CTL" pin="!A3.OE" pad="AO6"/>
<connect gate="CTL" pin="!ALU.OE" pad="DO08"/>
<connect gate="CTL" pin="!CMD.OE" pad="DO00"/>
<connect gate="CTL" pin="!D0.OE" pad="DO04"/>
<connect gate="CTL" pin="!D1.OE" pad="DO05"/>
<connect gate="CTL" pin="!D2.OE" pad="DO06"/>
<connect gate="CTL" pin="!D2A.OE" pad="AO1"/>
<connect gate="CTL" pin="!D3.OE" pad="DO07"/>
<connect gate="CTL" pin="!IO.IRPT" pad="INT"/>
<connect gate="CTL" pin="!IO.OE" pad="DO02"/>
<connect gate="CTL" pin="!IO.RESET" pad="RES"/>
<connect gate="CTL" pin="!IO.WAIT" pad="WAIT"/>
<connect gate="CTL" pin="!IVAL.OE" pad="DO15"/>
<connect gate="CTL" pin="!MEM.OE" pad="DO01"/>
<connect gate="CTL" pin="!PC.OE" pad="AO0"/>
<connect gate="CTL" pin="!SL.OE" pad="DO13"/>
<connect gate="CTL" pin="!SP.OE" pad="AO2"/>
<connect gate="CTL" pin="!SR.OE" pad="DO12"/>
<connect gate="CTL" pin="!SWAP.OE" pad="DO10"/>
<connect gate="CTL" pin="!XXX2.OE" pad="DO09"/>
<connect gate="CTL" pin="!XXX3.OE" pad="DO11"/>
<connect gate="CTL" pin="(A2D.CLK)" pad="DC03"/>
<connect gate="CTL" pin="(D2A.CLK)" pad="AC1"/>
<connect gate="CTL" pin="16TO4.CLK" pad="DC14"/>
<connect gate="CTL" pin="A.ADD" pad="C5"/>
<connect gate="CTL" pin="A.CPL" pad="C4"/>
<connect gate="CTL" pin="A0.CLK" pad="AC3"/>
<connect gate="CTL" pin="A1.CLK" pad="AC4"/>
<connect gate="CTL" pin="A2.CLK" pad="AC5"/>
<connect gate="CTL" pin="A3.CLK" pad="AC6"/>
<connect gate="CTL" pin="ALU.CLK" pad="DC08"/>
<connect gate="CTL" pin="ALU.CY" pad="CY"/>
<connect gate="CTL" pin="ALU.OVFL" pad="FFFF"/>
<connect gate="CTL" pin="ALU.Z" pad="Z"/>
<connect gate="CTL" pin="CLK" pad="CLK"/>
<connect gate="CTL" pin="CMD.CLK" pad="DC00"/>
<connect gate="CTL" pin="D0" pad="C6"/>
<connect gate="CTL" pin="D0.CLK" pad="DC04"/>
<connect gate="CTL" pin="D1.CLK" pad="DC05"/>
<connect gate="CTL" pin="D15" pad="C7"/>
<connect gate="CTL" pin="D2.CLK" pad="DC06"/>
<connect gate="CTL" pin="D2AR.CLK" pad="DC15"/>
<connect gate="CTL" pin="D2AR.OE" pad="AO7"/>
<connect gate="CTL" pin="D3.CLK" pad="DC07"/>
<connect gate="CTL" pin="IO.CLK" pad="DC02"/>
<connect gate="CTL" pin="IO.RND" pad="Z88"/>
<connect gate="CTL" pin="IOADDR.CLK" pad="AC7"/>
<connect gate="CTL" pin="MEM.CLK" pad="DC01"/>
<connect gate="CTL" pin="OPT.CPL" pad="C3"/>
<connect gate="CTL" pin="OPT.CY" pad="C2"/>
<connect gate="CTL" pin="OPT.FU0" pad="C0"/>
<connect gate="CTL" pin="OPT.FU1" pad="C1"/>
<connect gate="CTL" pin="PC.CLK" pad="AC0"/>
<connect gate="CTL" pin="SL.CLK" pad="DC13"/>
<connect gate="CTL" pin="SP.CLK" pad="AC2"/>
<connect gate="CTL" pin="SR.CLK" pad="DC12"/>
<connect gate="CTL" pin="SWAP.CLK" pad="DC10"/>
<connect gate="CTL" pin="XXX2.CLK" pad="DC09"/>
<connect gate="CTL" pin="XXX3.CLK" pad="DC11"/>
<connect gate="P" pin="GND@0" pad="G1"/>
<connect gate="P" pin="GND@1" pad="G2"/>
<connect gate="P" pin="GND@2" pad="G3"/>
<connect gate="P" pin="GND@3" pad="G4"/>
<connect gate="P" pin="GND@4" pad="G5"/>
<connect gate="P" pin="GND@5" pad="G6"/>
<connect gate="P" pin="GND@6" pad="G7"/>
<connect gate="P" pin="GND@7" pad="G8"/>
<connect gate="P" pin="GND@8" pad="G9"/>
<connect gate="P" pin="GND@9" pad="G10"/>
<connect gate="P" pin="VCC@0" pad="V1"/>
<connect gate="P" pin="VCC@1" pad="V2"/>
<connect gate="P" pin="VCC@2" pad="V3"/>
<connect gate="P" pin="VCC@3" pad="V4"/>
<connect gate="P" pin="VCC@4" pad="V5"/>
<connect gate="P" pin="VCC@5" pad="V6"/>
<connect gate="P" pin="VCC@6" pad="V7"/>
<connect gate="P" pin="VCC@7" pad="V8"/>
<connect gate="P" pin="VCC@8" pad="V9"/>
<connect gate="P" pin="VCC@9" pad="V10"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
<device name="-IO" package="K1-CPU-IO">
<connects>
<connect gate="ADBUS" pin="A0" pad="A00"/>
<connect gate="ADBUS" pin="A1" pad="A01"/>
<connect gate="ADBUS" pin="A10" pad="A10"/>
<connect gate="ADBUS" pin="A11" pad="A11"/>
<connect gate="ADBUS" pin="A12" pad="A12"/>
<connect gate="ADBUS" pin="A13" pad="A13"/>
<connect gate="ADBUS" pin="A14" pad="A14"/>
<connect gate="ADBUS" pin="A15" pad="A15"/>
<connect gate="ADBUS" pin="A2" pad="A02"/>
<connect gate="ADBUS" pin="A3" pad="A03"/>
<connect gate="ADBUS" pin="A4" pad="A04"/>
<connect gate="ADBUS" pin="A5" pad="A05"/>
<connect gate="ADBUS" pin="A6" pad="A06"/>
<connect gate="ADBUS" pin="A7" pad="A07"/>
<connect gate="ADBUS" pin="A8" pad="A08"/>
<connect gate="ADBUS" pin="A9" pad="A09"/>
<connect gate="ADBUS" pin="D0" pad="D00"/>
<connect gate="ADBUS" pin="D1" pad="D01"/>
<connect gate="ADBUS" pin="D10" pad="D10"/>
<connect gate="ADBUS" pin="D11" pad="D11"/>
<connect gate="ADBUS" pin="D12" pad="D12"/>
<connect gate="ADBUS" pin="D13" pad="D13"/>
<connect gate="ADBUS" pin="D14" pad="D14"/>
<connect gate="ADBUS" pin="D15" pad="D15"/>
<connect gate="ADBUS" pin="D2" pad="D02"/>
<connect gate="ADBUS" pin="D3" pad="D03"/>
<connect gate="ADBUS" pin="D4" pad="D04"/>
<connect gate="ADBUS" pin="D5" pad="D05"/>
<connect gate="ADBUS" pin="D6" pad="D06"/>
<connect gate="ADBUS" pin="D7" pad="D07"/>
<connect gate="ADBUS" pin="D8" pad="D08"/>
<connect gate="ADBUS" pin="D9" pad="D09"/>
<connect gate="CTL" pin="!16TO4.OE" pad="DO14"/>
<connect gate="CTL" pin="!A0.OE" pad="AO3"/>
<connect gate="CTL" pin="!A1.OE" pad="AO4"/>
<connect gate="CTL" pin="!A2.OE" pad="AO5"/>
<connect gate="CTL" pin="!A2D.OE" pad="DO03"/>
<connect gate="CTL" pin="!A3.OE" pad="AO6"/>
<connect gate="CTL" pin="!ALU.OE" pad="DO08"/>
<connect gate="CTL" pin="!CMD.OE" pad="DO00"/>
<connect gate="CTL" pin="!D0.OE" pad="DO04"/>
<connect gate="CTL" pin="!D1.OE" pad="DO05"/>
<connect gate="CTL" pin="!D2.OE" pad="DO06"/>
<connect gate="CTL" pin="!D2A.OE" pad="AO1"/>
<connect gate="CTL" pin="!D3.OE" pad="DO07"/>
<connect gate="CTL" pin="!IO.IRPT" pad="INT"/>
<connect gate="CTL" pin="!IO.OE" pad="DO02"/>
<connect gate="CTL" pin="!IO.RESET" pad="RES"/>
<connect gate="CTL" pin="!IO.WAIT" pad="WAIT"/>
<connect gate="CTL" pin="!IVAL.OE" pad="DO15"/>
<connect gate="CTL" pin="!MEM.OE" pad="DO01"/>
<connect gate="CTL" pin="!PC.OE" pad="AO0"/>
<connect gate="CTL" pin="!SL.OE" pad="DO13"/>
<connect gate="CTL" pin="!SP.OE" pad="AO2"/>
<connect gate="CTL" pin="!SR.OE" pad="DO12"/>
<connect gate="CTL" pin="!SWAP.OE" pad="DO10"/>
<connect gate="CTL" pin="!XXX2.OE" pad="DO09"/>
<connect gate="CTL" pin="!XXX3.OE" pad="DO11"/>
<connect gate="CTL" pin="(A2D.CLK)" pad="DC03"/>
<connect gate="CTL" pin="(D2A.CLK)" pad="AC1"/>
<connect gate="CTL" pin="16TO4.CLK" pad="DC14"/>
<connect gate="CTL" pin="A.ADD" pad="C5"/>
<connect gate="CTL" pin="A.CPL" pad="C4"/>
<connect gate="CTL" pin="A0.CLK" pad="AC3"/>
<connect gate="CTL" pin="A1.CLK" pad="AC4"/>
<connect gate="CTL" pin="A2.CLK" pad="AC5"/>
<connect gate="CTL" pin="A3.CLK" pad="AC6"/>
<connect gate="CTL" pin="ALU.CLK" pad="DC08"/>
<connect gate="CTL" pin="ALU.CY" pad="CY"/>
<connect gate="CTL" pin="ALU.OVFL" pad="FFFF"/>
<connect gate="CTL" pin="ALU.Z" pad="Z"/>
<connect gate="CTL" pin="CLK" pad="CLK"/>
<connect gate="CTL" pin="CMD.CLK" pad="DC00"/>
<connect gate="CTL" pin="D0" pad="C6"/>
<connect gate="CTL" pin="D0.CLK" pad="DC04"/>
<connect gate="CTL" pin="D1.CLK" pad="DC05"/>
<connect gate="CTL" pin="D15" pad="C7"/>
<connect gate="CTL" pin="D2.CLK" pad="DC06"/>
<connect gate="CTL" pin="D2AR.CLK" pad="DC15"/>
<connect gate="CTL" pin="D2AR.OE" pad="AO7"/>
<connect gate="CTL" pin="D3.CLK" pad="DC07"/>
<connect gate="CTL" pin="IO.CLK" pad="DC02"/>
<connect gate="CTL" pin="IO.RND" pad="Z88"/>
<connect gate="CTL" pin="IOADDR.CLK" pad="AC7"/>
<connect gate="CTL" pin="MEM.CLK" pad="DC01"/>
<connect gate="CTL" pin="OPT.CPL" pad="C3"/>
<connect gate="CTL" pin="OPT.CY" pad="C2"/>
<connect gate="CTL" pin="OPT.FU0" pad="C0"/>
<connect gate="CTL" pin="OPT.FU1" pad="C1"/>
<connect gate="CTL" pin="PC.CLK" pad="AC0"/>
<connect gate="CTL" pin="SL.CLK" pad="DC13"/>
<connect gate="CTL" pin="SP.CLK" pad="AC2"/>
<connect gate="CTL" pin="SR.CLK" pad="DC12"/>
<connect gate="CTL" pin="SWAP.CLK" pad="DC10"/>
<connect gate="CTL" pin="XXX2.CLK" pad="DC09"/>
<connect gate="CTL" pin="XXX3.CLK" pad="DC11"/>
<connect gate="P" pin="GND@0" pad="G1"/>
<connect gate="P" pin="GND@1" pad="G2"/>
<connect gate="P" pin="GND@2" pad="G3"/>
<connect gate="P" pin="GND@3" pad="G4"/>
<connect gate="P" pin="GND@4" pad="G5"/>
<connect gate="P" pin="GND@5" pad="G6"/>
<connect gate="P" pin="GND@6" pad="G7"/>
<connect gate="P" pin="GND@7" pad="G8"/>
<connect gate="P" pin="GND@8" pad="G9"/>
<connect gate="P" pin="GND@9" pad="G10"/>
<connect gate="P" pin="VCC@0" pad="V1"/>
<connect gate="P" pin="VCC@1" pad="V2"/>
<connect gate="P" pin="VCC@2" pad="V3"/>
<connect gate="P" pin="VCC@3" pad="V4"/>
<connect gate="P" pin="VCC@4" pad="V5"/>
<connect gate="P" pin="VCC@5" pad="V6"/>
<connect gate="P" pin="VCC@6" pad="V7"/>
<connect gate="P" pin="VCC@7" pad="V8"/>
<connect gate="P" pin="VCC@8" pad="V9"/>
<connect gate="P" pin="VCC@9" pad="V10"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
<deviceset name="K1-CPU-SSW">
<gates>
<gate name="ADBUS" symbol="K1-CPU"/>
<gate name="CTL" symbol="K1-CPU-CTL-SSW"/>
<gate name="P" symbol="K1-CPU-PWR"/>
</gates>
<devices>
<device name="" package="K1-CPU">
<connects>
<connect gate="ADBUS" pin="A0" pad="A00"/>
<connect gate="ADBUS" pin="A1" pad="A01"/>
<connect gate="ADBUS" pin="A10" pad="A10"/>
<connect gate="ADBUS" pin="A11" pad="A11"/>
<connect gate="ADBUS" pin="A12" pad="A12"/>
<connect gate="ADBUS" pin="A13" pad="A13"/>
<connect gate="ADBUS" pin="A14" pad="A14"/>
<connect gate="ADBUS" pin="A15" pad="A15"/>
<connect gate="ADBUS" pin="A2" pad="A02"/>
<connect gate="ADBUS" pin="A3" pad="A03"/>
<connect gate="ADBUS" pin="A4" pad="A04"/>
<connect gate="ADBUS" pin="A5" pad="A05"/>
<connect gate="ADBUS" pin="A6" pad="A06"/>
<connect gate="ADBUS" pin="A7" pad="A07"/>
<connect gate="ADBUS" pin="A8" pad="A08"/>
<connect gate="ADBUS" pin="A9" pad="A09"/>
<connect gate="ADBUS" pin="D0" pad="D00"/>
<connect gate="ADBUS" pin="D1" pad="D01"/>
<connect gate="ADBUS" pin="D10" pad="D10"/>
<connect gate="ADBUS" pin="D11" pad="D11"/>
<connect gate="ADBUS" pin="D12" pad="D12"/>
<connect gate="ADBUS" pin="D13" pad="D13"/>
<connect gate="ADBUS" pin="D14" pad="D14"/>
<connect gate="ADBUS" pin="D15" pad="D15"/>
<connect gate="ADBUS" pin="D2" pad="D02"/>
<connect gate="ADBUS" pin="D3" pad="D03"/>
<connect gate="ADBUS" pin="D4" pad="D04"/>
<connect gate="ADBUS" pin="D5" pad="D05"/>
<connect gate="ADBUS" pin="D6" pad="D06"/>
<connect gate="ADBUS" pin="D7" pad="D07"/>
<connect gate="ADBUS" pin="D8" pad="D08"/>
<connect gate="ADBUS" pin="D9" pad="D09"/>
<connect gate="CTL" pin="!IO.INT" pad="INT"/>
<connect gate="CTL" pin="!IO.RES" pad="RES"/>
<connect gate="CTL" pin="!IO.WAIT" pad="WAIT"/>
<connect gate="CTL" pin="AC0" pad="AC0"/>
<connect gate="CTL" pin="AC1" pad="AC1"/>
<connect gate="CTL" pin="AC2" pad="AC2"/>
<connect gate="CTL" pin="AC3" pad="AC3"/>
<connect gate="CTL" pin="AC4" pad="AC4"/>
<connect gate="CTL" pin="AC5" pad="AC5"/>
<connect gate="CTL" pin="AC6" pad="AC6"/>
<connect gate="CTL" pin="AC7" pad="AC7"/>
<connect gate="CTL" pin="ALU.CY" pad="CY"/>
<connect gate="CTL" pin="ALU.OVFL" pad="FFFF"/>
<connect gate="CTL" pin="ALU.Z" pad="Z"/>
<connect gate="CTL" pin="AO0" pad="AO0"/>
<connect gate="CTL" pin="AO1" pad="AO1"/>
<connect gate="CTL" pin="AO2" pad="AO2"/>
<connect gate="CTL" pin="AO3" pad="AO3"/>
<connect gate="CTL" pin="AO4" pad="AO4"/>
<connect gate="CTL" pin="AO5" pad="AO5"/>
<connect gate="CTL" pin="AO6" pad="AO6"/>
<connect gate="CTL" pin="AO7" pad="AO7"/>
<connect gate="CTL" pin="CLK" pad="CLK"/>
<connect gate="CTL" pin="D0" pad="C6"/>
<connect gate="CTL" pin="D15" pad="C7"/>
<connect gate="CTL" pin="DC0" pad="DC00"/>
<connect gate="CTL" pin="DC1" pad="DC01"/>
<connect gate="CTL" pin="DC10" pad="DC10"/>
<connect gate="CTL" pin="DC11" pad="DC11"/>
<connect gate="CTL" pin="DC12" pad="DC12"/>
<connect gate="CTL" pin="DC13" pad="DC13"/>
<connect gate="CTL" pin="DC14" pad="DC14"/>
<connect gate="CTL" pin="DC15" pad="DC15"/>
<connect gate="CTL" pin="DC2" pad="DC02"/>
<connect gate="CTL" pin="DC3" pad="DC03"/>
<connect gate="CTL" pin="DC4" pad="DC04"/>
<connect gate="CTL" pin="DC5" pad="DC05"/>
<connect gate="CTL" pin="DC6" pad="DC06"/>
<connect gate="CTL" pin="DC7" pad="DC07"/>
<connect gate="CTL" pin="DC8" pad="DC08"/>
<connect gate="CTL" pin="DC9" pad="DC09"/>
<connect gate="CTL" pin="DO0" pad="DO00"/>
<connect gate="CTL" pin="DO1" pad="DO01"/>
<connect gate="CTL" pin="DO10" pad="DO10"/>
<connect gate="CTL" pin="DO11" pad="DO11"/>
<connect gate="CTL" pin="DO12" pad="DO12"/>
<connect gate="CTL" pin="DO13" pad="DO13"/>
<connect gate="CTL" pin="DO14" pad="DO14"/>
<connect gate="CTL" pin="DO15" pad="DO15"/>
<connect gate="CTL" pin="DO2" pad="DO02"/>
<connect gate="CTL" pin="DO3" pad="DO03"/>
<connect gate="CTL" pin="DO4" pad="DO04"/>
<connect gate="CTL" pin="DO5" pad="DO05"/>
<connect gate="CTL" pin="DO6" pad="DO06"/>
<connect gate="CTL" pin="DO7" pad="DO07"/>
<connect gate="CTL" pin="DO8" pad="DO08"/>
<connect gate="CTL" pin="DO9" pad="DO09"/>
<connect gate="CTL" pin="IO.RND" pad="Z88"/>
<connect gate="CTL" pin="OPT0" pad="C0"/>
<connect gate="CTL" pin="OPT1" pad="C1"/>
<connect gate="CTL" pin="OPT2" pad="C2"/>
<connect gate="CTL" pin="OPT3" pad="C3"/>
<connect gate="CTL" pin="OPT4" pad="C4"/>
<connect gate="CTL" pin="OPT5" pad="C5"/>
<connect gate="P" pin="GND@0" pad="G1"/>
<connect gate="P" pin="GND@1" pad="G2"/>
<connect gate="P" pin="GND@2" pad="G3"/>
<connect gate="P" pin="GND@3" pad="G4"/>
<connect gate="P" pin="GND@4" pad="G5"/>
<connect gate="P" pin="GND@5" pad="G6"/>
<connect gate="P" pin="GND@6" pad="G7"/>
<connect gate="P" pin="GND@7" pad="G8"/>
<connect gate="P" pin="GND@8" pad="G9"/>
<connect gate="P" pin="GND@9" pad="G10"/>
<connect gate="P" pin="VCC@0" pad="V1"/>
<connect gate="P" pin="VCC@1" pad="V2"/>
<connect gate="P" pin="VCC@2" pad="V3"/>
<connect gate="P" pin="VCC@3" pad="V4"/>
<connect gate="P" pin="VCC@4" pad="V5"/>
<connect gate="P" pin="VCC@5" pad="V6"/>
<connect gate="P" pin="VCC@6" pad="V7"/>
<connect gate="P" pin="VCC@7" pad="V8"/>
<connect gate="P" pin="VCC@8" pad="V9"/>
<connect gate="P" pin="VCC@9" pad="V10"/>
</connects>
<technologies>
<technology name=""/>
</technologies>
</device>
</devices>
</deviceset>
</devicesets>
</library>
</drawing>
</eagle>
