* 68HC11F1 UoW bootstrap program to rewrite system control registers. * Phillip Musumeci * define hardware addresses REGBS equ $1000 TMSK2 equ REGBS+$24 ;timer interrupt register BPROT equ REGBS+$35 ;block protect reg OPT2 equ REGBS+$38 ;system configuration options 2 OPTION equ REGBS+$39 ;system configuration options HPRIO equ REGBS+$3C ;highest priority I-bit and miscellaneous INIT equ REGBS+$3D ;RAM and IO Map register CONFIG equ REGBS+$3F ;CONFIG register PPROG equ REGBS+$3B ;ee prog reg CSCTL equ REGBS+$5D ;chip select control CSGADR equ REGBS+$5E ;general purpose CS CSGSIZ equ REGBS+$5F ;chip select size #if defined CRYSTAL16 * (Listing file for 16MHz crystal version) #elif defined CRYSTAL12 * (Listing file for 12MHz crystal version) #else * (Listing file for 8MHz crystal version) #endif *************************************************************************** * define CONFIG setting * CS3F = %1110x1x1 [F1 technical data pages 4-21 and 4-12] * where |||| | ^ EEPROM is enabled * |||| ^ COP system disabled * ^^^^ EEPROM mapped to EE00-EFFF * * and where the two x=don't_cares above are chosen as 1. CS3F EQU %11101111 * * ;cse; choose CSCTL as * CS5D = %10100101 [F1 technical data page 4-24] * where ||||||^^ program chip select size = 32K * |||||^ program chip select (CSPROG) enabled on portG.7 * ||||| (after RESET in expanded modes) * ||||| * ||||^ general purpose chip select (CSGEN) has priority over * |||| program chip select (CSPROG) [contradicts description of GCSPR * |||| on page 4-25, and is described in section * |||| 4.5.1 at bottom of page 4-21] * |||| * |||^ CSIO2 active low * ||^ CSIO2 enabled on portG.4 * |^ CSIO1 active low * ^ CSIO1 enabled on portG.5 CS5D EQU %10100101 * * ;cse; choose CSGADR as * CS5E = %0xxxxx-- [F1 technical data pages 4-25 and 4-23] * where ||||||^^ not used * |^^^^^ don't care when CS5F chosen for 32K device. * ^ means general purpose chip select (CSGEN) starts at * address %0000.0000.0000.0000 = $0000. * * Note: Since the general purpose CSGEN is in the low 32K, only 3K+24K of * CSGEN's lower address space is accessed as internal RAM and IO plus * the CSIO lines occupy 1K+4K of this lower address space. CS5E EQU %00000000 * * ;cse; choose CSGSIZ as * CS5F = %00-00001 [F1 technical data pages 4-26] * where || ||^^^ general purpose chip select size = 32K * || |^ CSGEN valid in E-clock valid time * || ^ CSGEN is active low * ^^ CSIO1 and CSIO2 valid in E-clock valid time CS5F EQU %00000001 * locate program at bootstrap start address of $0000 org 0 * Since this program is position independent, we can arrange for an FF * byte to prepend the executable code by placing one right here... fcb $FF *************************************************************************** * start of executable code (will actually be at 0000 and not 0001 in the HC11) sei ; ensure interrupts disabled ldaa HPRIO anda #%11100000 ; retain bits: RBOOT,SMOD,MDA oraa #%00000110 ; enable bits: PSEL2,PSEL1 staa HPRIO ldaa #%00000001 ; RAM @ 0000-0FFF ; REG @ 1xxx staa INIT clr OPT2 ; port G & port C normal ; no 4xout signal. ldaa #CS5D ; set 68HC11F1 options as per UoW F1 board staa CSCTL ldaa #CS5E staa CSGADR ldaa #CS5F staa CSGSIZ *************************************************************************** * rewrite CONFIG (see Figure 3-2 of the HC11 REFERENCE MANUAL) clr BPROT ; clear eeprom block protect ldab #$06 ; Bulk erase, and EELAT on stab PPROG ; write to PPROG control stab CONFIG ; write any data to CONFIG incb ; [B] goes from 6 to 7 i.e. EEPGM=1 stab PPROG ; write to PPROG control *----------------------- * bsr DLY10 ; delay 10ms for erase to complete * (put delay subroutine in-line so we don't need to depend on a stack) pshx ; 10ms delay (does not clear PPROG) #if defined CRYSTAL16 ldx #$1A0C ; $0D06 * %10.0 (16MHz crystal) #elif defined CRYSTAL12 ldx #$1389 ; $0D06 * %1.10 (12MHz crystal) #else ldx #$0D06 ; $0D06 * %1 (8MHz crystal) #endif DLOOP1 dex bne DLOOP1 pulx *----------------------- clr PPROG ; turn off the charge pump (EEPGM=0) ldab #$02 ; turn on EELAT stab PPROG ; write to PPROG control ldaa #CS3F ; write CS3F pattern to CONFIG staa CONFIG incb ; [B] goes from 2 to 3 i.e. EEPGM=1 stab PPROG ; write to PPROG control *----------------------- * bsr DLY10 ; delay 10ms for erase to complete * (put delay subroutine in-line so we don't need to depend on a stack) pshx ; 10ms delay (does not clear PPROG) #if defined CRYSTAL16 ldx #$1A0C ; $0D06 * %10.0 (16MHz crystal) #elif defined CRYSTAL12 ldx #$1389 ; $0D06 * %1.10 (12MHz crystal) #else ldx #$0D06 ; $0D06 * %1 (8MHz crystal) #endif DLOOP2 dex bne DLOOP2 pulx *----------------------- clr PPROG ; turn off the charge pump (EEPGM=0) *************************************************************************** INFINIT bra INFINIT ;wait for the next RESET * pad out for a total of 1+1024 bytes fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff fcb $ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff,$ff end ***************************************************************************