AY-3-8912 PSG Documentation PSG pins ______ ______ ANALOG CHANNEL C =|1 U 28|= DA0 TEST 1 =| |= DA1 Vcc (+5v)=| |= DA2 ANALOG CHANNEL B =| |= DA3 ANALOG CHANNEL A =| |= DA4 Vss (Gnd)=| AY-3-8912 |= DA5 IOA7 =| |= DA6 IOA6 =| |= DA7 IOA5 =| |= BC1 IOA4 =| |= BC2 IOA3 =| |= BDIR IOA2 =| |= A8 IOA1 =| |= /RESET IOA0 =|14_________15|= CLOCK IOA0-IOA7 = Input/output port A data lines DA0 - DA7 = Data lines (contain bytes to poke etc) ANALOG CHANNEL A/B/C = Analogue output of sound BC1/BC2/BDIR = Function selection of PSG /RESET = Chip reset CLOCK = 1Mhz clock (used to calculate sound frequency etc) THIS TABLE IS WRONG! kio 2007-08-08 BC1 and BDIR are swapped! BC1 BC2 BDIR Function 0 0 0 Inactive 0 0 1 Set PSG register 0 1 0 Inactive 0 1 1 Read data from a PSG register 1 0 0 Set PSG Register 1 0 1 Inactive 1 1 0 Write data to a PSG register 1 1 1 Set PSG Register Controlling the PSG The PSG has three independant tone channels and one noise channel. These can be mixed to produce a variety of sounds. Just listen to a Soundtrakker or Protracker/Digitraker music to see what the PSG is capable of. To control the tone, volume, noise and enveloping of the sound the PSG has 15 registers. These registers are accessed by bits 7 and 6 of port &F6xx and data written to/read from port &F4xx of the 8255 PPI. The PSG also has a secondary function and that is to scan the keyboard. ** Data written to ports &F6xx and &F4xx remain until new data is programmed. ** Register selection Before reading or writing to the PSG, the appropiate register must be selected. This is done by putting the register number (0-14) into port &F4xx, and setting bits 7 and 6 of port &F6xx to 1. The register will now be selected and the user can now read or write a value to it. Finally, the PSG must be put into an inactive state by setting bit 7 and 6 to 0 of port &F6xx. This is necessary, otherwise if the register select command was still in operation, and a byte was sent to port &F4xx, it would use this and change the data in the last register selected. (see below) Writing to a PSG register To write data to the PSG, the user must put the data in port &F4xx, and then set bit 7 to 1 and bit 6 to 0 of port &F6xx. The data will be written into the register. Finally, the PSG must be put into an inactive state by setting bit 7 and 6 to 0 of port &F6xx. Reading from a PSG register To read data from the PSG, the user must put port &F4xx into input mode (See the section on the 8255 PPI to find out how to do this), then the user must set bit 7 to 0 and bit 6 to 1 of port &F6xx. The data in the PSG register will be supplied to port &F4xx, and this can now be read by the user. When it has been read, the PSG must be put in an inactive state, by setting bits 7 and 6 to 0 of port &F6xx, and port &F4xx must be returned to output mode. Note: It is necessary to change port &F4xx to input mode otherwise the data will not be read from the PSG register, and it is also necessary to return port &F4xx to output mode, otherwise when the 'select register' or 'write to register' commands are specified they will not work. In between sets of data sent to control the PSG, the PSG should be set to inactive, otherwise unexpected sounds could be generated becuause the function would still be active. Example: THIS IS NOT THE CORRECT WAY TO PROGRAM THE PSG ld a,7 ;register to select ld bc,&F400 ;send register out (c),a ld bc,&F600 ;SPECIFY PSG REGISTER ld a,%11000000 out (c),a ;AT THIS POINT THE 'SPECIFY PSG REGISTER' ;COMMAND IS STILL ACTIVE ;NEW DATA WRITTEN TO PORT &F4xx WILL STILL ;BE USED TO SELECT THE REGISTER ;THE WRITE TO PORT &F4xx BELOW,WILL SELECT ;REGISTER 5 NOW, SINCE THE SPECIFY PSG COMMAND ;IS STILL ;ACTIVE!!!!!!!!!!!!!!!!!!!! ;SENDING AN INACTIVE COMMAND WILL STOP THIS ;HAPPENING!! ld a,5 ;data to write into register ld bc,&F400 out (c),c ld bc,&F600 ld a,%10000000 ;WRITE TO PSG REGISTER out (c),a There are examples at the end of this section, showing how to read and write data to the PSG. Summary: Port &F6xx Bit 7 Bit 6 Function 0 0 INACTIVE The PSG is put into inactive state. Previous function cancelled. 0 1 READ from PSG register. The user wants to read the value contained in the currently selected PSG register. The value contained in the currently selected register is supplied to port &F4xx. 1 0 WRITE to PSG register. The user wants to write a value to the currently selected register. The value written to port &F4xx is the value which is to be written into the currently selected register. 1 1 SPECIFY PSG register. The user wants to select which register is to be read from/written to. The value witten to port &F4xx contains the register number, where register number must be in the range 0-14. The register selected will remain active, until another is selected. Register Functions This is a list of the PSG registers. They are described in more detail in the next section. Register Function 0 Channel A tone period {fine tune} 1 Channel A tone period {coarse tune} 2 Channel B tone period {fine tune} 3 Channel B tone period {coarse tune} 4 Channel C tone period {fine tune} 5 Channel C tone period {coarse tune} 6 Noise generator 7 Mixer control 8 Channel A volume/Hardware envelope enable 9 Channel B volume/Hardware envelope enable 10 Channel C volume/Hardware envelope enable 11 Hardware envelope period {fine tune} 12 Hardware envelope period {coarse tune} 13 Hardware envelope shape 14 Port A data (Used for reading the keyboard) NOTE: {fine tune} = send low byte of the value required (bits 7-0) {coarse tune} = send high byte of the value required. (bits 15-8) Register Functions Register 0,1 Channel A tone These two registers specify the tone period. The tone period values possible are in the range 0-4096, although not all will produce a tone. The higher the tone value, the higher the pitch of the note, similarly, the lower the tone value, the lower the pitch will be. The tone period is the same as used in the BASIC sound command. For example: A tone period of 478 will play middle C. Sound_chip_clock = 1 Mhz Tone period = (Sound_chip_clock/16)/frequency Tone period=(62500/frequency) Frequency=440*(2^(Octave+((N-10)/12)) Summary: Register 0:- Bit 7: } lower eight bits of tone period required Bit 6: } Bit 5: } Bit 4: } Bit 3: } Bit 2: } Bit 1: } Bit 0: } Register 1:- Bit 7: } Unused Bit 6: } Bit 5: } Bit 4: } Bit 3: } Upper four bits of tone period required Bit 2: } Bit 1: } Bit 0: } NOTE: For a tone to be heard, the channel on which it is to be played must have a volume (greater than 0), and its associated tone disable flag must be set to 0 (i.e. the tone is enabled) in the mixer control register. Register 2 and 3 Channel B tone period These registers define the tone period for channel B in the same way as for channel A. Summary: Register 2:- Bit 7: } lower eight bits of tone period required Bit 6: } Bit 5: } Bit 4: } Bit 3: } Bit 2: } Bit 1: } Bit 0: } Register 3:- Bit 7: } Unused Bit 6: } Bit 5: } Bit 4: } Bit 3: } Upper four bits of tone period required Bit 2: } Bit 1: } Bit 0: } Register 4 and 5 Channel C tone period These registers define the tone period for channel C, in the same way as for channel A. Summary: Register 4:- Bit 7: } lower eight bits of tone period required Bit 6: } Bit 5: } Bit 4: } Bit 3: } Bit 2: } Bit 1: } Bit 0: } Register 5:- Bit 7: } Unused Bit 6: } Bit 5: } Bit 4: } Bit 3: } Upper four bits of tone period required Bit 2: } Bit 1: } Bit 0: } Register 6 - Noise generator This register defines the level of noise to be produced. The level of noise is defined in bits 4-0, where the value is in the range 0-31. Low values produce hissing, while large values produce grating noises. Summary: Bit 7: } Not used Bit 6: } Bit 5: } Bit 4: } Level of noise required Bit 3: } Bit 2: } Bit 1: } Bit 0: } NOTE: For noise to be heard, the channel on which it is to be played must have a volume greater than 0 and the appropiate bit in the mixer control register must be 0. Frequency of noise = (Sound_chip_clock/16)/Noise_period Register 7 - Mixer control This register determines whether tone and/or noise is to be included when the sound is output. It also specifies whether the I/O port is to be used for input or output of data. Bit Function 0 Channel A tone enable/disable. 1 Channel B tone enable/disable. 2 Channel C tone enable/disable. These bits determine whether tone is to be output. To allow tone from a channel the appropiate bit must be set to 0. Similarly to disable sound from a channel the appropiate bit must be set to 1. 3 Channel A noise enable/disable. 4 Channel B noise enable/disable. 5 Channel C noise enable/disable. These bits determine on which channels the noise is to be output. To allow noise to be included, the appropiate bit must be set to 0. Similarly, to prevent noise from being included, the appropiate bit must be set to 1. 6 Port A I/O Control This bit determines in which state (e.g. input or output) the port is to be operated. If this bit is set to 1, port A will be used for output. If this bit is set to 0, port A will be used for input. 7 Not Used. Summary: Bit 7: Not used. Bit 6: Port A control. Bit 5: Channel C enable/disable noise. Bit 4: Channel B enable/disable noise. Bit 3: Channel A enable/disable noise. Bit 2: Channel C enable/disable tone. Bit 1: Channel B enable/disable tone. Bit 0: Channel A enable/disable tone. Registers 8-10 Channel Volume control Each channel has a volume. The volume can either be controlled directly, or by using the hardware envelope. This is controlled by bit 4 of the value sent to the appropiate register. If bit 4 is set to 1, the volume is controlled by hardware enveloping (selected with registers 11-13), and bits 3-0 are ignored. If bit 4 is set to 0, bits 3-0 hold the volume to be used. The volume is in the range 0-15, where 0 is no volume and 15 which is maximum volume. Summary: Bit 7: } Not used Bit 6: } Bit 5: } Bit 4: Amplitude mode 1: Enable hardware enveloping, 0: Disable hardware enveloping. (Use amplitude specified in bits 3-0) Bit 3: } Amplitude (0-15) Bit 2: } Bit 1: } Bit 0: } Registers 11 and 12 Hardware envelope period These registers define the period for one cycle of the required hardware envelope. The larger the value sent the longer the cycle will be, similarly the smaller the value sent the shorter the cycle will be. Period = (sound_chip_clock/256)/programmed_value Period=12500*time (s) ---- 16 Summary:- Register 11: Bit 7: } lower 8 bits of the envelope period required Bit 6: } Bit 5: } Bit 4: } Bit 3: } Bit 2: } Bit 1: } Bit 0: } Register 12: Bit 7: } upper 8 bits of the envelope period required Bit 6: } Bit 5: } Bit 4: } Bit 3: } Bit 2: } Bit 1: } Bit 0: } Register 13 Hardware envelope shape Hardware enveloping is used to produce special effects. It works by modifying the volume output on the channel which is enabled. The shape of the envelope defines how the volume is affected. If the envelope slopes upwards the volume will be increased, and if the envelope slopes downwards the volume will be decreased. If the envelope repeatedly slopes up and down, the volume will repeatedly rise to a maximum and then drop a minimum. The envelope shape is defined by the lower 4 bits of the value sent to register 13. The shapes of envelopes that can be produced is shown in the table below. Summary: Bit 7: } Not used Bit 6: } Bit 5: } Bit 4: } Bit 3: Continue ;} See table for envelope shapes. Bit 2: Attack ;} Bit 1: Alternate ;} Bit 0: Hold ;} For envelope 1010: 15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 Hardware Envelope shapes x indicates bit with any value (either 1 or 0) Bits Envelope shape 3 2 1 0 ----------------------------------------------------------------- 0 0 x x \________________________ 0 1 x x /|_______________________ 1 0 0 0 \|\|\|\|\|\|\|\|\|\|\|\|\ 1 0 0 1 \________________________ 1 0 1 0 \/\/\/\/\/\/\/\/\/\/\/\/\ _______________________ 1 0 1 1 \| 1 1 0 0 /|/|/|/|/|/|/|/|/|/|/|/|/ ________________________ 1 1 0 1 / 1 1 1 0 /\/\/\/\/\/\/\/\/\/\/\/\/ 1 1 1 1 /|_______________________ Register 14 - Port A This register holds any data which is written to/read from port A of the PSG. In the CPC, port A is used for a special function. It is used for scanning the keyboard. It must only be read, writing values to this port may have an unpredicted result. To read a value from this port, it must be put into input mode by setting bit 6 of register 7 (mixer control) of the PSG to 0. Usually, this is not necessary as port A always operates as input, unless it has been changed by the user. When this is done, port &F4xx of the 8255 must be programmed to operate in input mode. The data may then be read from register 14. Remember to program port &F4xx to operate in output mode again. To write a value to this port, it must be put into output mode by setting bit 6 of register 7 (mixer control) of the PSG to 1. The user can then write the byte into the register. To see how the keyboard is controlled via this port, please see the section on reading the keyboard. Summary: Bit 7: } Port A data Bit 6: } Bit 5: } Bit 4: } Bit 3: } Bit 2: } Bit 1: } Bit 0: } Note: - The tone is a square wave with the frequency defined by registers 0,1 (for channel A), 2,3 (for channel B), 4,5 (for channel C). - The noise is a "frequency modulated pseudo random pulse width square wave output" Programming Examples (1) Reading a value from a PSG register. This example routine would return the value contained in register 7 (mixer control) of the PSG. ld b,&f4 ;} Send register number to PSG. ld c,7 ;} (mixer control) out (c),c ;} ld b,&f6 ;} Tell PSG a register number is going to be ld c,%11000000 ;} sent out (c),c ;} ld b,&f6 ;} Put PSG into inactive state ld c,%00000000 out (c),c ;** Set port &F4xx to input mode. ** ld b,&f7 ; 8255 PPI Control ld a,%10010010 ; mode and port configuration out (c),a ; Port A input, Port B input, Port C output ; All operating in mode 0. (see Programming ; 8255 PPI) ld b,&f6 ;} Tell PSG the selected register is going to ld c,%01000000 ;} be read out (c),c ;} ld b,&f4 ;} Read value in a,(c) ;} ;** Set port &F4xx to output mode. * ld b,&f7 ld a,%10000010 ;8255 PPI Control out (c),a ;Port A output, Port B input, Port C output ld b,&f6 ;} Return PSG to inactive mode. ld c,%00000000 ;} out (c),c ;} ret (2) Writing to a PSG register. This routine would program register 8 of the PSG (channel A volume/hardware envelope enable) to have a value of 15 (maximum volume), assuming port &F4xx is in output mode. ld b,&f4 ;} Send register number to PSG ld c,8 ;} (channel A volume/Hardware env enable) out (c),c ;} ld b,&f6 ;} Tell PSG a register number is going to be ld c,%11000000 ;} sent out (c),c ;} ld b,&f6 ;} Put PSG into inactive state. ld c,%00000000 ;} out (c),c ;} ld b,&f4 ;} Send value to PSG ld c,15 ;} out (c),c ;} ld b,&f6 ;} Tell PSG the selected register is going ld c,%10000000 ;} to be written to out (c),c ;} ld b,&f6 ;} Return PSG inactive mode. ld c,%00000000 ;} out (c),c ;} ret