Backplane:
Only connectors and signal traces, no active parts

16 Boards: Bit Slices D0 .. D15
• 6 Registers
  + 6x RegXX.Addr.LE (strobed)
  + 6x RegXX.Data.LE (strobed)
  + 6x RegXX.Addr.OE (strobed)
  + 6x RegXX.Data.OE (strobed)
  + PC.set and PC.clr
• 4 Boolean result inputs
• 3 Function.OE (bool, arith, sr)
• !Data i/o
• !Addr.out
• Func.out (for COND.D0 and COND.D15)
• Data.Is0 (for COND.Z)
• Func.Is0 (for COND.Z)
• arith CYin and CYout
• SR CYin and CYout
+ 6x2 LEDs to display register contents

Board: Muxer & Signal Driver
Input:
• 4x3 register select bits
• 4x3 register select bits inverted (opt.)
• MOVE/FUNC select
• MOVE/FUNC select inverted (opt.)
• function output select arith/boolean result
• function output select arith/boolean result inverted (opt.)
• CYin
• 1 bit boolean result (+3 bits muxed with Reg.Data.in)
- actually only 1 bit of opcode is not used here
• 4x clock inputs for different phases
Output:
• 6x RegXX.Addr.LE (strobed)
• 6x RegXX.Data.LE (strobed)
• 6x RegXX.Addr.OE (strobed)
• 6x RegXX.Data.OE (strobed)
• 4 Boolean results
• 3 Function.OE (bool, arith, sr)
• CYout

Board: Memory & i/o Adapter
All wires twice: 1x to CPU (backplane) + 1x to memory (connector)
• 16x Memory Data i/o
• 16x Memory Addr out
• Mem.RD
• Mem.WR
• Wait
• Interrupt
• PC address flag (for µcode rom with separate addressing space)
• IP address flag (for program rom with separate addressing space)

Board: CMD Register
• 16x Data input
• 16x Data output
• 16x Data output inverted (opt.)
• CMD.LE

Board: Control Unit
• 4x clock out to driver
• wait
• interrupt (or driver board?!)
• Mem.RD
• Mem.WR
• Data.Is0
• Func.Is0
• D15.CYout
• Func.Bit0
• Func.Bit15
• Data.Bit0  (during FUNC! - opt.)
• Data.Bit15 (during FUNC! - opt.)
• PC14.set
• PC14.clr
• 3x CMD.COND
• 3x CMD.Data.out
• 3x CMD.Data.In
+ external clock & wait operator control