Interrupt numbers and the corresponding address
& descriptions for the Standard 8051/8052 are listed below. SDCC
will automatically adjust the to the
maximum interrupt number specified.
| Interrupt # | Description | Vector Address |
| 0 | External 0 | 0x0003 |
| 1 | Timer 0 | 0x000b |
| 2 | External 1 | 0x0013 |
| 3 | Timer 1 | 0x001b |
| 4 | Serial | 0x0023 |
| 5 | Timer 2 (8052) | 0x002b |
| ... | ... | |
| n | 0x0003 + 8*n |
If the interrupt service routine is defined without using a register bank or with register bank 0 (using 0), the compiler will save the registers used by itself on the stack upon entry and restore them at exit, however if such an interrupt service routine calls another function then the entire register bank will be saved on the stack. This scheme may be advantageous for small interrupt service routines which have low register usage.
If the interrupt service routine is defined to be using a specific register bank then only a, b, dptr & psw are saved and restored, if such an interrupt service routine calls another function (using another register bank) then the entire register bank of the called function will be saved on the stack. This scheme is recommended for larger interrupt service routines.